User Defined Registers
|
|
Register |
Address |
Bin |
Dec |
Hex |
|
Special Function Registers
|
|
Register |
Address |
Bin |
Dec |
Hex |
|
WREG | -1 | 00000000 | 0 | 0X00 | | INDF | 0 | 00000000 | 0 | 0X00 | | TMR0 | 1 | 00000000 | 0 | 0X00 | | PCL | 2 | 00000000 | 0 | 0X00 | | STATUS | 3 | 00011000 | 24 | 0X18 | | FSR | 4 | 00000000 | 0 | 0X00 | | PORTA | 5 | 00000000 | 0 | 0X00 | | PORTB | 6 | 00000000 | 0 | 0X00 | | EEDATA | 8 | 00000000 | 0 | 0X00 | | EEADR | 9 | 00000000 | 0 | 0X00 | | PCLATH | 10 | 00000000 | 0 | 0X00 | | INTCON | 11 | 00000000 | 0 | 0X00 | | OPTION_REG | 129 | 11111111 | 255 | 0XFF | | TRISA | 133 | 00011111 | 31 | 0X1F | | TRISB | 134 | 11111111 | 255 | 0XFF | | EECON1 | 136 | 00000000 | 0 | 0X00 | | EECON2 | 137 | 00000000 | 0 | 0X00 | |
|
Timer |
Frequency
|
IC:0
|
|
μS:0
|
PC:0
|
|
Interrupt Enable |
General |
|
External |
|
PORTB |
|
TMR0 |
|
EEPROM |
|
|
|